Miele T 9246 C Specifications download pdf (Page 20)

phase-phase spread

phases

t =

UCD9246

SLVSA34 –JANUARY 2010

www.ti.com

The PHASE_INFO PMBus command is also used to configure the number of power stages driving each voltage

rail. When multiple power stages are configured to drive a voltage rail, the UCD9246 automatically distributes the

phase of each DPWM output to minimize ripple. This is accomplished by setting the rising edge of each DPWM

pulse to be separated by:

(7)

Where t

is the switching period and N

Phases

is the number of power stages driving a voltage rail.

DPWM Synchronization

DPWM synchronization provides a method to link the timing between rails on two distinct devices at the switching

rate; i.e., two rails on different devices can be configured to run at the same frequency and sync forcing them not

to drift from each other. (Note that within a single device, because all rails are driven off a common clock there is

no need for an internal sync because rails will not drift.)

The PMBus SYNC_IN_OUT command sets which rails (if any) should follow the sync input, and which rail (if

any) should drive the sync output.

For rails that are following the sync input, the DPWM ramp timer for that output is reset when the sync input goes

high. This allows the slave device to sync to inputs that are faster. On the fast side, there is no limit to how much

faster the input is compared to the defined frequency of the rail; when the pulse comes in, the timer is reset and

the frequencies are locked. This is the standard mode of operation -setting the slave to run slower, and letting

the sync speed it up.

The Sync Input and Output Configuration Word set by the PMBus command consists of two bytes. The upper

byte (sync_out) controls which rail drives the sync output signal (0=DPWM1, 1=DPWM2, 2=DPWM3, 3=DPWM4.

Any other value disables sync_out). The lower byte (sync_in) determines which rail(s) respond to the sync input

signal (each bit represents one rail -note that multiple rails can be synchronized to the input). The DPWM period

is aligned to the sync input. For more information, see the UCD92xx PMBUS Command Reference.

Note that once a rail is synchronized to an external source, the rail-to-rail spacing that attempts to minimize input

current ripple is lost. Rail-to-rail spacing can only be restored by power cycling or issuing a SOFT_RESET

command.

Phase Shedding at Light Current Load

By issuing LIGHT_LOAD_LIMIT_LOW, LIGHT_LOAD_LIMIT_HIGH, and LIGHT_LOAD_CONFIG commands, the

UCD9246 can be configured to shed (disable) power stages when at light load. When this feature is enabled, the

device disables the configured number of power stages when the average current drops below the specified

LIGHT_LOAD_LIMIT_LOW. In addition, a separate set of compensation coefficients can be loaded into the

digital compensator when entering a light load condition.

Phase Adding at Normal Current Load

After shedding phases, if the current load is increased past the LIGHT_LOAD_LIMIT_HIGH threshold, all phases

are re-enabled. If the compensator was configured for light load, the normal load coefficients are restored as

well. See the UCD92xx PMBUS Command Reference for more information.

Output Current Measurement

Pins CS-1A, CS-1B, CS-2A, CS-2B, CS-3A, and CS-4A are used to measure either output current or inductor

current in each of the controlled power stages. PMBus commands IOUT_CAL_GAIN and IOUT_CAL_OFFSET

are used to calibrate each measurement. See the UCD92xx PMBus Command Reference for specifics on

configuring this voltage to current conversion.

When the measured current is outside the range of either the over-current or undercurrent threshold, a FAULT is

declared and the UCD9246 performs the PMBus configured fault recovery. ADC current measurements are

digitally averaged before they are compared against the FAULT threshold. The output current is measured at a

rate of one output rail per 200 microseconds. The current measurements are then passed through a smoothing

filter to reduce noise on the signal and prevent false errors. The output of the smoothing filter asymptotically

approaches the input value with a time constant that is approximately 3.5 times the sampling interval.

1 ... 19 20 21 ... 36

Comments to this Manuals

No comments

Miele T 9246 C Specifications Page 20

Comments to this Manuals

Related products and manuals for Electric laundry dryers Miele T 9246 C